Optimizing Bitmap Indexing on Multi-Core SIMD Processor Architectures
Michael Zwick
The fundamental problem of Optimizing Bitmap Indexing on Multi-Core SIMD Processor Architectures is treated in the PhD project by Michael Zwick. The PhD project, which primarily concerns SCCH’s DBT Area, is supervised by Prof. Dr. Josef Küng (Johannes Kepler University Linz). The goal of the project is to both empirically and theoretically evaluate the performance improvements achievable by implementing bitmap indexing on innovative multi-core SIMD processor architectures. Specifically, this PhD work aims to investigate the potential of multi-core SIMD processors for building inexpensive high-performance data warehousing systems. The Cell Broadband Engine Architecture was chosen for a prototype implementation because it offers advanced parallel computing capabilities (i.e., many cores, SIMD features, DMA) at low cost and with low power consumption. The long-term objective is to develop a data warehouse product that is both affordable and scalable. The current leaders of the decision support benchmark TPC-H6, both with respect to performance and price/performance, are not scalable in the sense of the current leading scalable commercial data warehouse product NCR/Teradata. However, the Teradata product is not price competitive in the segments where the TPC-H leaders play. The target is to gain TPC-H leadership with respect to price/performance, but with a scalable architecture.
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