Learning-based dynamic pinning of parallelized applications in many-core systems
Georgios C. Chasparis
|Title||Learning-based dynamic pinning of parallelized applications in many-core systems|
|Address||HLPGPU 2018 - High-Level Programming for Heterogeneous and Hierarchical Parallel Systems 2018 Workshop, Manchester, United Kingdom, January 23, 2018 in conjunction with HiPEAC 2018, Stockholm, Sweden, January 22-24, 2018.|
This paper introduces a resource allocation framework specifically tailored for addressing the problem of dynamic placement (or pinning) of parallelized applications into manycore systems. Under the proposed setup each thread of the parallelized application constitutes an independent decision maker (or agent), which (based on its own prior performance measurements and its own prior CPU-affinities) decides on which processing unit to run next. Decisions are updated recursively for each thread by a resource manager/scheduler which runs in parallel to the application’s threads and periodically records their performances and assigns to them new CPU affinities. We extend prior work of the authors by introducing a two-level decision making process that is more appropriate to handle many-core systems under Non-Uniform Memory Access architectures (NUMA). In particular, the first level may handle pinning of threads or memory over the available NUMA nodes, while the second level may handle pinning over the available CPU cores of the selected NUMA nodes. Under such framework, a learning process updates current estimates and decisions separately for each one of the two decision levels. Additionally, a novel performance-based learning dynamics is introduced which is more appropriate to handle measurement noise and rapid variations in the performance of the threads. Experiments are performed in a many-core Linux platform, where we show that the proposed dynamic scheduler achieves higher running average speed and adaptivity than the operating system.