Performance Aspects of Correctness-oriented Synthesis Flows
|F. Bornebusch, C. Lüth, R. Wille, R. Drechsler. Performance Aspects of Correctness-oriented Synthesis Flows. Int’l Conf. on Model-Driven Engineering and Software Development (MODELSWARD), DOI https://doi.org/10.5220/0010235100760086, 2, 2021.|
|Journal||Int’l Conf. on Model-Driven Engineering and Software Development (MODELSWARD)|
When designing electronic circuits, available synthesis flows either focus on accelerating the synthesized circuit or correctness. In the quest for ever-faster hardware designs, the correctness of these designs is often neglected. Thus, designers need to trade-off between correctness and performance. The question is how large the trade-off is? This work presents a systematic comparison of two representative synthesis flows, the LegUp HLS framework as a representative for flows focusing on hardware acceleration, and a flow based on the proof assistant Coq focusing on correctness. For evaluation purposes, a 32-bit MIPS processor synthesized using the two flows, and the final HDL implementations are compared regarding their performance. Our evaluation allows a quantitative analysis of the trade-off, showing that correctness-oriented synthesis flows are competitive concerning performance.